A Method to Abstract RTL IP Blocks into C plus plus Code and Enable High-Level Synthesis

被引:0
|
作者
Bombieri, Nicola [1 ]
Liu, Hung-Yi
Fummi, Franco [1 ]
Carloni, Luca
机构
[1] Univ Verona, Dip Informat, I-37100 Verona, Italy
关键词
RTL IP reuse; System-level Design;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
We present a method to automatically generate a synthesizable C++ specification from the given RTL design of an IP block, by abstracting away most of its micro-architectural characteristics while preserving its functionality. The goal is twofold: recover the IP block specification for system-level design, and enable the derivation of more optimized implementations through high-level synthesis. The C++ specification can be generated with different interfaces thus allowing the IP model to be reused across different system platforms. Experimental results show that the proposed approach not only enhances the reusability of the recovered IP block but also unveils a richer design space to explore.
引用
收藏
页数:9
相关论文
共 50 条
  • [21] RMACXX: An Efficient High-Level C plus plus Interface over MPI-3 RMA
    Ghosh, Sayan
    Guo, Yanfei
    Balaji, Pavan
    Gebremedhin, Assefaw H.
    21ST IEEE/ACM INTERNATIONAL SYMPOSIUM ON CLUSTER, CLOUD AND INTERNET COMPUTING (CCGRID 2021), 2021, : 143 - 155
  • [22] Design and validation of a C plus plus code generator from Abstract State Machines specifications
    Bonfanti, Silvia
    Gargantini, Angelo
    Mashkoor, Atif
    JOURNAL OF SOFTWARE-EVOLUTION AND PROCESS, 2020, 32 (02)
  • [23] An interactive design environment for c-based high-level synthesis of RTL processors
    Shin, Dongwan
    Gerstlauer, Andreas
    Domer, Rainer
    Gajski, Daniel D.
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (04) : 466 - 475
  • [24] Integrating golog plus plus and ROS for Practical and Portable High-level Control
    Kirsch, Maximillian
    Matare, Victor
    Ferrein, Alexander
    Schiffer, Stefan
    ICAART: PROCEEDINGS OF THE 12TH INTERNATIONAL CONFERENCE ON AGENTS AND ARTIFICIAL INTELLIGENCE, VOL 2, 2020, : 692 - 699
  • [25] VPS: Excavating High-Level C plus plus Constructs from Low-Level Binaries to Protect Dynamic Dispatching
    Pawlowski, Andre
    van der Veen, Victor
    Andriesse, Dennis
    van der Kouwe, Erik
    Holz, Thorsten
    Giuffrida, Cristiano
    Bos, Herbert
    35TH ANNUAL COMPUTER SECURITY APPLICATIONS CONFERENCE (ACSA), 2019, : 97 - 112
  • [26] High-Level Synthesis of Key Based Obfuscated RTL Datapaths
    Islam, Sheikh Ariful
    Katkoori, Srinivas
    2018 19TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2018, : 407 - 412
  • [27] Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis
    Badier, Hannah
    Pilato, Christian
    Le Lann, Jean-Christophe
    Coussy, Philippe
    Gogniatt, Guy
    PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), 2021, : 52 - 55
  • [28] Portable High-level Agent Programming with golog plus
    Matare, Victor
    Viehmann, Tarik
    Hofmann, Till
    Lakemeyer, Gerhard
    Ferrein, Alexander
    Schiffer, Stefan
    ICAART: PROCEEDINGS OF THE 13TH INTERNATIONAL CONFERENCE ON AGENTS AND ARTIFICIAL INTELLIGENCE - VOL 2, 2021, : 218 - 227
  • [29] From C/C plus plus Code to High-Performance Dataflow Circuits
    Josipovic, Lana
    Guerrieri, Andrea
    Ienne, Paolo
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (07) : 2142 - 2155
  • [30] PHAST-A Portable High-Level Modern C plus plus Programming Library for GPUs and Multi-Cores
    Peccerillo, Biagio
    Bartolini, Sandro
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2019, 30 (01) : 174 - 189