A Subthreshold 10T SRAM Cell With Enhanced Read and Write Operations

被引：0

作者：

Zhang, Jiubai ^{[1
]}

Wu, Xiaoqing ^{[1
]}

Yi, Xilin ^{[1
]}

Lv, Jiaxun ^{[1
]}

He, Yajuan ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, Chengdu 610054, Sichuan, Peoples R China

来源：

2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2019年

基金：

中国国家自然科学基金;

关键词：

SRAM; subthreshold; static noise margin; write margin; power; SCHEME; DESIGN;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a novel 10T static random access memory (SRAM) cell for ultra-low voltage operations. A built-in read assist scheme is proposed to eliminate the read disturb issue. It significantly improves the read stability. In addition, a data-aware write assist technique is also proposed to enhance the write ability of the SRAM cell. Simulations are performed in a 40-nm standard CMOS technology at a 0.4V supply voltage. The experimental results indicate that the proposed 10T SRAM cell exhibits the best write margin and large read static noise margin. When compared with the conventional 6T SRAM cell, it achieves 2.95x larger read static noise margin and 1.93x higher write margin.

引用

页数：4

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