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- [2] A novel low-cost pluggable chip scale package for high pin-count applications 51ST ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2001, : 69 - 73
- [3] A novel low-cost pluggable chip scale package for high-pin-count applications 2001 HD INTERNATIONAL CONFERENCE ON HIGH-DENSITY INTERCONNECT AND SYSTEMS PACKAGING, PROCEEDINGS, 2001, 4428 : 292 - 296
- [4] Electrical Design and Techniques for an Embedded High-Pin-Count LSI Chip Package IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2011, 1 (10): : 1543 - 1552
- [5] Electrical Design and Demonstration of an Embedded High-pin-count LSI Chip Package 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 482 - +
- [6] Reliability of Thin Seamless Package with Embedded High-Pin-Count LSI Chip 2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 36 - 39
- [7] Compliant probe substrates for testing high pin-count chip scale packages 52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS, 2002, : 1188 - 1193
- [8] Is TAB the right package for high-pin-count devices? Prasad, Ray P., 1600, IHS Publ Group, Libertyville, IL, United States (09):
- [10] Molded Underfill for Flip Chip Package 2013 8TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2013, : 310 - 314