Design of Reversible Ternary Adder/Subtractor and Encoder/Priority Encoder Circuits

被引:0
|
作者
Ghosh, Kaustav [1 ]
Haque, Md. Misbahul [1 ]
Chakraborty, Sanjay [1 ]
机构
[1] Inst Engn & Management Kolkata, Comp Sci & Engn, Kolkata, W Bengal, India
关键词
Quantum Circuit; Reversible logic; Qutrits; Ternary Adder; Subtractor; Quantum cost; Ternary Priority Encoder;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ternary quantum logic plays a very important role for building high speed and efficient futuristic computers. It has several advantages over classical computing and binary quantum circuits. In this paper, the realization of basic ternary circuits for adder/subtractor, encoder and priority encoder are proposed and designed. These circuits are very essential for the construction of various computational units of quantum computers and other complex computational systems. Design of reversible circuits can be improved by reducing the quantum circuit cost. This paper uses some elementary components and typical ternary gates (generalized ternary gate, M-S gate etc.) to perform arithmetic addition, subtraction and encoding operations. Finally, it evaluates the optimum cost for each circuit.
引用
收藏
页码:1290 / 1295
页数:6
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