A BiCMOS time-to-digital converter with 30 ps resolution

被引：0

作者：

Räisänen-Ruotsalainen, E ^{[1
]}

Rahkonen, T ^{[1
]}

Kostamovaara, J ^{[1
]}

机构：

[1] Univ Oulu, Elect Lab, Dept Elect Engn & Infotech Oulu, FIN-90570 Oulu, Finland

来源：

ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI | 1999年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A time-to-digital converter (TDC) with 32 ps LSB and 2.5 mu s measurement range has been implemented in a 0.8 mu m BiCMOS process. The TDC is based on a main counter and two separate time digitizers for interpolation inside the clock period. The clock frequency of the counter is 100 MHz and the interpolators are based on dual-slope conversion. According to test results, the stop single-shot resolution of the TDC is 30ps (sigma-value) and nonlinearity is less than +/-5 ps when input time intervals range from 5 ns to 2.5 mu s. The conversion time is < 6.3 mu s. Temperature drift, excluding the temperature dependence of the oscillator, is below +/- 40 ps in a temperature range of -40 - +60 degrees C. The size of this chip, including pads, is 3.3 mm x 3.4 mm and its power consumption is 350 mW.

引用

页码：278 / 281

页数：4

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