共 50 条
- [1] Design-for-Testability Techniques for Arithmetic Circuits [J]. IEEE CIRCUITS AND SYSTEMS INTERNATIONAL CONFERENCE ON TESTING AND DIAGNOSIS, 2009, : 513 - 516
- [2] Towards Design-for-Testability for Digital Microfluidics [J]. DTIP 2009: SYMPOSIUM ON DESIGN, TEST, INTEGRATION AND PACKAGING OF MEMS/MOEMS, 2009, : 329 - 333
- [3] Delay Design-for-Testability for Functional RTL Circuits [J]. 2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE), 2015, : 494 - 499
- [4] Design-for-Testability for Digital Microfluidic Biochips [J]. 2009 27TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2009, : 309 - 314
- [5] Design-for-testability for switched-current circuits [J]. 16TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1998, : 370 - 375
- [6] Design-for-testability of the FLOVA [J]. PROCEEDINGS OF THE SECOND IEEE ASIA PACIFIC CONFERENCE ON ASICS, 2000, : 319 - 322
- [7] DESIGN-FOR-TESTABILITY AUTOMATION OF MIXED-SIGNAL INTEGRATED CIRCUITS [J]. 2013 IEEE 26TH INTERNATIONAL SOC CONFERENCE (SOCC), 2013, : 244 - 249
- [8] A design-for-testability technique for detecting delay faults in logic circuits [J]. ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : 201 - 204
- [9] A design-for-testability technique for detecting delay faults in logic circuits [J]. PROCEEDINGS OF THE 8TH GREAT LAKES SYMPOSIUM ON VLSI, 1998, : 249 - 255
- [10] Testing and Design-for-Testability Solutions for 3D Integrated Circuits [J]. 2011 IEEE 14TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2011, : 5 - 5