A Tool Set for Teaching Design-for-Testability of Digital Circuits

被引:0
|
作者
Kostin, S. [1 ]
Orasson, E. [1 ]
Ubar, R. [1 ]
机构
[1] Tallinn Univ Technol, Akad Tee 15a, EE-12618 Tallinn, Estonia
关键词
e-learning; design-for-testability; test generation; built-in self-test; controllability; observability; LFSR; stuck-at fault model; fault simulation;
D O I
暂无
中图分类号
G40 [教育学];
学科分类号
040101 ; 120403 ;
摘要
We propose a tool set for teaching and e-learning the main principles of design-for-testability technics for digital systems. It is a collection of software tools which simulate a circuit under test, emulate a pool of different strategies, methods and algorithms of self-testing and improve testability of the exercised circuit. The tools support university courses on digital electronics, testing of digital systems, design for test to learn by hands-on exercises how to design digital systems, how to make them testable, how to build self-testing systems, how to generate test patterns, how to analyze the quality of tests and how to assure the required quality by improving the testability. General ideas of organization of hands-on laboratory research are outlined. The research tasks are set up in a way that involves a competition between students, and as a consequence, motivates them to better understand the problem, and to look for best strategies of design-for-testability.
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页数:6
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