A Hardware Implementation of SOM Neural Network Algorithm

被引：1
|
作者：
Yi, Qian [1 ]
机构：
[1] Taishan Univ, Dept Informat Sci & Technol, Tai An, Shandong, Peoples R China
来源：
2018 INTERNATIONAL CONFERENCE ON SENSOR NETWORKS AND SIGNAL PROCESSING (SNSP 2018) | 2018年
关键词：
SOM; FPGA; architecture; parallel;
D O I：
10.1109/SNSP.2018.00101
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Aiming at the real-time problem of SOM(Self-Organizing Feature Map) neural network algorithm based on FPGA(Field Programmable Gate Array), this paper analyzes the parallelism and resource reuse of algorithm process, presents a parallel architecture to implement the algorithm, and gives the hardware design method of the key modules in the architecture. It is simulated by Modelsim and runs on the FPGA development board. The experimental results show that the architecture can ensure the performance of neural network and the circuit has a high processing speed.
引用
收藏
页码：508 / 511
页数：4
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