A Scaled LSE Wirelength Model for VLSI Global Placement

By ignoring some cell overlaps, the common objective of the very large scale integration (VLSI) global placement problem is to minimize its total half-perimeter wirelength (HPWL). As the HPWL is not differentiable, the log-sum-exponential (LSE) wirelength model, one of the most powerful differentiable wirelength approximation functions, has been adopted in several nonlinear programming-based placers. In this paper, a scaled LSE (sLSE) wirelength model is proposed to approximate HPWL. In the sLSE wirelength model, the wirelength is calculated according to the exact wirelength of each net, which is a more exact approximation of HPWL. Based on the sLSE wirelength model and the framework of placer NTUplace3, an sLSE based nonlinear solver is generated to solve the VLSI global placement problem. Comparisons of experimental results show that the sLSE wirelength model can approximate HPWL more accurately than the LSE wirelength model.