A Dual-Mode Programing Nonvolatile Floating-Gate Memory with Convertible Ohmic and Schottky Contacts

被引:1
|
作者
Zhang, Chi [1 ,2 ]
Ning, Jing [1 ,2 ]
Wang, Boyu [1 ,2 ]
Wang, Dong [1 ,2 ,3 ]
Zhang, Jincheng [1 ,2 ]
Hao, Yue [1 ,2 ]
机构
[1] Xidian Univ, State Key Discipline Lab Wide Band Gap Semicond Te, Xian 710071, Peoples R China
[2] Xidian Univ, Shaanxi Joint Key Lab Graphene, Xian 710071, Peoples R China
[3] Xidian Wuhu Res Inst, Wuhu 241000, Peoples R China
关键词
dual-mode processing program; floating-gate field-effect transistor; nonvolatile memory; WS2; HETEROSTRUCTURES; GRAPHENE;
D O I
10.1002/aelm.202300503
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Research on van der Waals heterostructures based on stacked two-dimensional atomic thickness crystals has received considerable attention because of their unique characters and great potential applications in flexible transparent electronics and optoelectronics. In this study, a nonvolatile memory device with a few-layer bipolar material WS2 as channel and charge-trapping layers is designed with a floating-gate structure in which charges (electrons and holes) can be stored in the charge-trapping layer using a dual-mode processing program by changing the metal-semiconductor contact type. The device exhibits different programming currents during programming, in particular, the device has a low programming current for programming voltages (<)20 V. Moreover, the heterostructure exhibits a remarkable long retention time (approximate to 10,000 s), with no apparent degradation and a strong endurance, retaining its original performance even after 1,000 programming/erasing cycles. This study proposes a novel method for reducing power consumption while programming to facilitate artificial synapse applications.
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页数:6
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共 30 条
  • [1] NEW APPROACH FOR FLOATING-GATE MOS NONVOLATILE MEMORY
    LEE, HS
    [J]. APPLIED PHYSICS LETTERS, 1977, 31 (07) : 475 - 476
  • [2] Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate
    Lee, C
    Hou, TH
    Kan, ECC
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (12) : 2697 - 2702
  • [3] Nonvolatile floating-gate memory programming enhancement using well bias
    Makwana, JJ
    Schroder, DK
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (02) : 258 - 262
  • [4] DIFMOS - FLOATING-GATE ELECTRICALLY ERASABLE NONVOLATILE SEMICONDUCTOR MEMORY TECHNOLOGY
    GOSNEY, WM
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1977, 24 (05) : 594 - 599
  • [5] Synthesis and characterization of aerosol silicon nanocrystal nonvolatile floating-gate memory devices
    Ostraat, ML
    De Blauwe, JW
    Green, ML
    Bell, LD
    Brongersma, ML
    Casperson, J
    Flagan, RC
    Atwater, HA
    [J]. APPLIED PHYSICS LETTERS, 2001, 79 (03) : 433 - 435
  • [6] Floating-Gate Nonvolatile Memory With Ultrathin 5-nm Tunnel Oxide
    Ma, Yanjun
    Deng, Rui
    Nguyen, H.
    Wang, Bin
    Pesavento, Alberto
    Niset, M.
    Paulsen, Ron
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (12) : 3476 - 3481
  • [7] Intrinsic mismatch between floating-gate nonvolatile memory cell and equivalent transistor
    Duane, Russell
    Rafhay, Quentin
    Beug, M. Florian
    van Duuren, Michiel
    [J]. IEEE ELECTRON DEVICE LETTERS, 2007, 28 (05) : 440 - 442
  • [8] Organic transistor nonvolatile memory with an integrated molecular floating-gate/tunneling layer
    Xu, Ting
    Guo, Shuxu
    Xu, Meili
    Li, Shizhang
    Xie, Wenfa
    Wang, Wei
    [J]. APPLIED PHYSICS LETTERS, 2018, 113 (24)
  • [9] Solution Processed Organic Transistor Nonvolatile Memory With a Floating-Gate of Carbon Nanotubes
    Wang, Guodong
    Liu, Xiaolian
    Wang, Wei
    [J]. IEEE ELECTRON DEVICE LETTERS, 2018, 39 (01) : 111 - 114
  • [10] A NONVOLATILE ANALOG NEURAL MEMORY USING FLOATING-GATE MOS-TRANSISTORS
    YANG, H
    SHEU, BJ
    LEE, JC
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1992, 2 (01) : 19 - 25