Delay fault simulation of sequential circuits

被引：0
|
作者：
Hirabayashi, Kanji [1 ]
机构：
[1] Toshiba Corp, ULSI Research Cent, Kawasaki, Japan
来源：
Journal of Electronic Testing: Theory and Applications (JETTA) | 1993年 / 4卷 / 02期
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9;
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页码：131 / 136
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