Design and implementation of a reversible logic based 8-bit arithmetic and logic unit

被引：0
|
作者：
Arunachalam, Kamaraj [1 ]
Perumalsamy, Marichamy [2 ]
Sundaram, C. Kalyana [1 ]
Kumar, J. Senthil [1 ]
机构：
[1] Department of ECE, Mepco Schlenk Engineering College, Sivakasi, India
[2] P.S.R. Engineering College, Sivakasi, India
来源：
International Journal of Computers and Applications | 2014年 / 36卷 / 02期
关键词：
D O I：
10.2316/Journal.202.2014.2.202-3832
中图分类号：
学科分类号：
摘要：
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页码：49 / 55
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