共 50 条
- [1] Design of Arithmetic Logic Unit using Reversible Logic Gates 2024 2ND WORLD CONFERENCE ON COMMUNICATION & COMPUTING, WCONF 2024, 2024,
- [2] QCA Implementation of Arithmetic Unit using Reversible Logic Gates 2024 7TH INTERNATIONAL CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS, ICDCS 2024, 2024, : 163 - 168
- [3] Design and Implementation of 4-Bit Arithmetic Logic Unit using Quantum Dot Cellular Automata PROCEEDINGS OF THE 2013 3RD IEEE INTERNATIONAL ADVANCE COMPUTING CONFERENCE (IACC), 2013, : 1022 - 1029
- [4] Design and Synthesis of Reversible Arithmetic and Logic Unit (ALU) 2014 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATIONS, AND CONTROL TECHNOLOGY (I4CT), 2014, : 289 - 293
- [6] Novel design and simulation of reversible ALU in quantum dot cellular automata JOURNAL OF SUPERCOMPUTING, 2022, 78 (01): : 868 - 882
- [7] An Arithmetic Logic Unit Design Based on Reversible Logic Gates 2011 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING (PACRIM), 2011, : 925 - 931
- [9] Design and Implementation of Arithmetic Logic Unit (ALU) using Modified Novel Bit Adder in QCA 2015 INTERNATIONAL CONFERENCE ON INNOVATIONS IN INFORMATION, EMBEDDED AND COMMUNICATION SYSTEMS (ICIIECS), 2015,