HIGH-SPEED MOS MEMORY

被引：0

作者：

IEDA, N

YOSHIMURA, H

ASAOKA, T

机构：

[1] NIPPON TELEG & TEL PUBL CORP, RES DEV BUR, MUSASHINO, JAPAN

[2] ELECT COMMUN LAB, PLANNING & COORDINATION OFF, MUSASHINO, JAPAN

[3] ELECT COMMUN LAB, INTEGRATED ELECTR DEV DIV, SOLID STATE EQUIPMENT SECT, MUSASCHINO, JAPAN

来源：

REVIEW OF THE ELECTRICAL COMMUNICATIONS LABORATORIES | 1973年 / 21卷 / 7-8期

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：473 / 481

页数：9

共 50 条

[31] DESIGN OF HIGH-SPEED BIPOLAR MEMORY LSI
HOMMA, N
INADACHI, M
YAMAGUCHI, K
KITSUKAWA, G
ELECTRONICS & COMMUNICATIONS IN JAPAN, 1977, 60 (12): : 94 - 102
[32] HIGH-SPEED FIFO MEMORY - THEORY AND APPLICATIONS
CHOCHELES, E
SIERRA, R
ELECTRONIC PRODUCTS MAGAZINE, 1983, 25 (13): : 85 - 89
[33] DIVIDED ATTENTION AND HIGH-SPEED MEMORY SEARCH
OKADA, R
BURROWS, D
JOURNAL OF EXPERIMENTAL PSYCHOLOGY, 1974, 103 (02): : 191 - 195
[34] A genetic basis for high-speed memory scanning
Vinkhuyzen, Annabelle A. E.
van der Sluis, Sophie
Boomsma, Dorret I.
de Geus, Eco J. C.
Posthuma, Danielle
BEHAVIOR GENETICS, 2007, 37 (06) : 805 - 806
[35] ENCODING AND HIGH-SPEED MEMORY SCANNING - COMMENT
SILVERMAN, WP
AMERICAN JOURNAL OF MENTAL DEFICIENCY, 1978, 83 (02): : 188 - 190
[36] MEMORY HARDWARE FOR HIGH-SPEED JOB SELECTION
SMITH, CH
WITTIE, LD
IEEE TRANSACTIONS ON COMPUTERS, 1976, 25 (02) : 148 - 156
[37] OPTIMIZED ESD PROTECTION CIRCUITS FOR HIGH-SPEED MOS VLSI
FUJISHIN, E
GARRETT, K
LEVIS, MP
MOTTA, RF
HARTRANFT, M
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (02) : 594 - 596
[38] High-Speed DDR Memory Raises The Stakes On Memory Validation And Test
Waller, Reg
ELECTRONICS WORLD, 2012, 118 (1919): : 42 - 43
[39] HIGH-SPEED CHARACTERISTICS OF LAMINATED FERRITE MEMORY PLANES
LI, K
IEEE TRANSACTIONS ON MAGNETICS, 1968, MAG4 (03) : 583 - &
[40] MEMORY EFFICIENT AND HIGH-SPEED SEARCH HUFFMAN CODING
HASHEMIAN, R
IEEE TRANSACTIONS ON COMMUNICATIONS, 1995, 43 (10) : 2576 - 2581