INPUT COMPRESSION AND EFFICIENT VLSI ARCHITECTURES FOR RANK ORDER AND STACK FILTERS

被引:13
|
作者
ADAMS, GB
COYLE, EJ
LIN, LC
LUCKE, LE
PARHI, KK
机构
[1] School of Electrical Engineering, Purdue University, West Lafayette
[2] Department of Electrical Engineering, University of Minnesota, Minneapolis
基金
美国国家科学基金会;
关键词
INPUT COMPRESSION; RANK-ORDER FILTERS; STACK FILTERS; UNARY ENCODED RANK; VLSI ARCHITECTURE; WEIGHTED ORDER STATISTIC FILTERS;
D O I
10.1016/0165-1684(94)90159-7
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Rank-order-based filters include rank-order filters, stack filters, and weighted order statistic filters. The output of a rank-order-based filter is always one of the sample points in its input window; which one is chosen depends only upon the ranks and positions of the samples within the window. This paper introduces new architectures for rank-order-based filters. They all achieve fast, efficient operation by exploiting an algorithm called input compression. Under this algorithm, the sample points in the input window are first mapped to their relative ranks - the sample points in a window of size N + 1 would thus be mapped to the integers 0-N. The rank-order-based filter to be implemented is then applied directly to this compressed input, and the rank chosen is then mapped back to the sample of that rank in the original data to obtain the final output. This approach has been used to implement rank-order filters, in which case the same rank is always chosen from the compressed data. In this paper, which rank is chosen also depends on the positions of the ranks in the compressed data. Implementations employing input compression have several advantages. They are computationally efficient like running order sorters, yet can be pipelined to a fine degree like sorting networks. In stack filter implementations, the threshold decomposition circuitry can be eliminated when input compression is combined with unary encoding of the ranks. Weighted order statistic filter implementations based on input compression can support programmable, noninteger weights.
引用
收藏
页码:441 / 453
页数:13
相关论文
共 50 条
  • [31] Efficient design of minmax ODIF robust stack filters
    Dumitrescu, B
    Tabus, I
    Peltonen, S
    Astola, J
    Dougherty, E
    [J]. ISSPA 2001: SIXTH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, VOLS 1 AND 2, PROCEEDINGS, 2001, : 44 - 47
  • [32] Implementation and analysis of optimized architectures for rank order filter
    Meena, S. M.
    Linganagouda, K.
    [J]. JOURNAL OF REAL-TIME IMAGE PROCESSING, 2008, 3 (1-2) : 33 - 41
  • [33] EFFICIENT PARALLEL ALGORITHMS AND VLSI ARCHITECTURES FOR MANIPULATOR JACOBIAN COMPUTATION
    YEUNG, TB
    LEE, CSG
    [J]. IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS, 1989, 19 (05): : 1154 - 1166
  • [34] Efficient VLSI Architectures for Coupled-Layered Regenerating Codes
    Zhang, Xinmiao
    Xie, Zhenshan
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2020, 67 (10) : 1869 - 1873
  • [35] Efficient VLSI architectures of adaptive equalizers for QAM/VSB transmission
    Chae, SS
    Pan, SB
    Lee, GH
    Park, RH
    Lee, BU
    [J]. 1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS - VOL V: STATISTICAL SIGNAL AND ARRAY PROCESSING, APPLICATIONS, 1997, : 4117 - 4120
  • [36] Power and Area Efficient VLSI Architectures for Communication Signal Processing
    Markovic, Dejan
    Nikolic, Borivoje
    Brodersen, Robert W.
    [J]. 2006 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, VOLS 1-12, 2006, : 3223 - 3228
  • [37] EFFICIENT VLSI ARCHITECTURES FOR THE ARITHMETIC FOURIER-TRANSFORM (AFT)
    KELLEY, BT
    MADISETTI, VK
    [J]. IEEE TRANSACTIONS ON SIGNAL PROCESSING, 1993, 41 (01) : 365 - 384
  • [38] Rank order polynomial decomposition for image compression
    Egger, O
    Gruter, R
    Vesin, JM
    Kunt, M
    [J]. PROCEEDINGS OF THE 1998 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH AND SIGNAL PROCESSING, VOLS 1-6, 1998, : 2641 - 2644
  • [39] M-array VLSi architecture for order statistic filters
    Lin, CC
    Kuo, CJ
    [J]. 1996 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, CONFERENCE PROCEEDINGS, VOLS 1-6, 1996, : 3264 - 3267
  • [40] EFFICIENT VLSI ARCHITECTURE FOR LOSSLESS DATA-COMPRESSION
    KIM, YJ
    KIM, KS
    CHOI, KY
    [J]. ELECTRONICS LETTERS, 1995, 31 (13) : 1053 - 1054