EFFICIENT VLSI ARCHITECTURE FOR LOSSLESS DATA-COMPRESSION

被引：3
|
作者：
KIM, YJ
KIM, KS
CHOI, KY
机构：
[1] Department of Electronics Engineering, Seoul National University, Seoul
来源：
ELECTRONICS LETTERS | 1995年 / 31卷 / 13期
关键词：
DATA COMPRESSION; VLSI;
D O I：
10.1049/el:19950703
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An architecture for LZ1-type lossless data compression is described. The architecture is area efficient and fast, since it exploits the locality of substring match lengths. The property has been shown experimentally for various data and buffer lengths, and an architecture based on it has been designed.
引用
收藏
页码：1053 / 1054
页数：2
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