THE VIRTUAL FEEDBACK PROBLEM IN HIERARCHICAL REPRESENTATIONS OF COMBINATIONAL-CIRCUITS

Orders of magnitude of space and time can be saved if hierarchical algorithms are used for automatic synthesis and analysis of regular VLSI circuits. When we tried to apply this technique to compiled simulation of large regular combinational circuits, we observed that hierarchical representations of acyclic circuits often contain cycles. In this paper we study the question of whether this undesired property is necessary or not. We prove, that there are combinational circuits, which have a succinct cyclic hierarchical representation, but where each acyclic hierarchical representation is large. This negative result may be weakened, if we allow the circuits structure to be changed but not its behavior. We also discuss the effect of these observations on hierarchical simulation techniques and the complexity of pragmatic approaches such as the construction of a smallest acyclic refinement of a hierarchical representation. © 1991 Springer-Verlag.