Optimisation of Gate-Drain/Source Overlap in 90 nm NMOSFETs for Low Noise Amplifier Performance

被引：0

作者：

Srinivasan, R. ^{[1
]}

Bhat, Navakanta ^{[2
]}

机构：

[1] SSN Coll Engn, Dept Informat Technol, Kalavakkam 603110, India

[2] Indian Inst Sci, Dept Elect Commun Engn, Bangalore 560012, Karnataka, India

来源：

JOURNAL OF LOW POWER ELECTRONICS | 2008年 / 4卷 / 02期

关键词：

MOSFET; Overlap; LNA; Noise-Figure; TCAD;

D O I：

10.1166/jolpe.2008.256

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effect of gate-drain/source overlap (L-OV) on LNA performance has been studied, in 90nm NMOSFETs using process, device and mixed mode simulations. In order to have a fair comparison, the off-state leakage current (I-OFF) of MOSFETs is kept constant by adjusting the pocket halo dose as a function of varying L-OV. A basic LNA circuit with two transistors in cascode arrangement is constructed and the input impedance, gain and noise-figure have been used as performance metrics. It has been shown that 'control over L-OV' allows us to get better power and noise performance from the LNA i.e., it allows us to get minimum noise figure (NF) and maximum gain from the LNA. To get the better noise performance and gain, L-OV in the range of 0-10 nm is recommended.

引用

页码：240 / 246

页数：7

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