SUB-MICRON SILICON BIPOLAR MASTER-SLAVE D-TYPE FLIP-FLOP FOR USE AS 8-1 GBIT/S DECISION CIRCUIT AND 11-2 GBIT/S DEMULTIPLEXER

被引：9
|
作者：
RUNGE, K [1 ]
GIMLETT, JL [1 ]
CLAWIN, D [1 ]
WAY, W [1 ]
CHEUNG, NK [1 ]
KIPNIS, I [1 ]
SNAPP, C [1 ]
机构：
[1] AVANTEK INC,NEWARK,CA 94560
来源：
ELECTRONICS LETTERS | 1989年 / 25卷 / 20期
关键词：
D O I：
10.1049/el:19890899
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：1346 / 1347
页数：2
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