A 80-Gbit/s D-type flip-flop circuit using InPHEMT technology

被引：0

作者：

Suzuki, T ^{[1
]}

Takahashi, T ^{[1
]}

Hirose, T ^{[1
]}

Takigawa, M ^{[1
]}

机构：

[1] Fujitsu Labs Ltd, Atsugi, Kanagawa 2430197, Japan

来源：

GAAS IC SYMPOSIUM - 25TH ANNUAL TECHNICAL DIGEST 2003 | 2003年

关键词：

D-type flip-flop (D-FF); 80; Gbit/s; rat-race; InPHEMT;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

80-Gbit/s operation of a static D-type flip-flop (D-FF) circuit was achieved using InP-based HEMT technology with a cut-off frequency of 245 GHz and a transconductance of 1500 mS/mm. To generate 80-GHz differential clock signals from the single phase one in the circuit, a rat-race circuit was placed in front of the clock buffer The power supply voltage was -5.7 V and power consumption was 1.2 W Its performance was measured using a selector module that we developed The results showed that the D-FF operated at 80 Gbit/s, which was more than half as much again as speeds reported to date.

引用

页码：165 / 168

页数：4

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