High-performance texture decompression hardware

被引：0
|
作者：
Anders Kugler
机构：
[1] Universität Tübingen,
[2] Wilhelm-Schickard-Institut für Informatik,undefined
[3] Graphisch-Interaktive Systeme (WSI/GRIS),undefined
[4] Auf der Morgenstelle 10,undefined
[5] D-72076 Tübingen,undefined
[6] Germany e-mail: kugler@gris.uni-tuebingen.de http://www.gris.uni-tuebingen.de/∼kugler,undefined
来源：
The Visual Computer | 1997年 / 13卷
关键词：
Key words: Graphics hardware; Texture mapping; Image quantisation and compression; filtering;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：51 / 63
页数：12
相关论文
共 50 条
  • [31] Supraclavicular Thoracic Outlet Decompression in the High-Performance Military Population
    White, Joseph M.
    Hoo, Andrew J. Soo
    Golarz, Scott R.
    MILITARY MEDICINE, 2018, 183 (1-2) : E90 - E94
  • [32] High-Performance Hydrogels via Alternate Compression-Decompression
    Qiao, Pu
    Li, Bo
    He, Yuan
    Shi, Kaiyuan
    Zhang, Xin
    Zhang, Jiaqing
    Wang, Yanlong
    Su, Lei
    Chen, Yongmei
    Nishinari, Katsuyoshi
    Yang, Guoqiang
    JOURNAL OF PHYSICAL CHEMISTRY C, 2022, 126 (51): : 21825 - 21832
  • [33] Dynamic Hardware Plugins (DHP): Exploiting reconfigurable hardware for high-performance programmable routers
    Taylor, DE
    Turner, JS
    Lockwood, JW
    2001 IEEE OPEN ARCHITECTURES AND NETWORK PROGRAMMING PROCEEDINGS, 2001, : 25 - 34
  • [34] Hardware technologies for high-performance data-intensive computing
    Gokhale, Maya
    Cohen, Jonathan
    Yoo, Andy
    Miller, W. Marcus
    Jacob, Arpith
    Ulmer, Craig
    Pearce, Roger
    COMPUTER, 2008, 41 (04) : 60 - +
  • [35] A High-Performance Hardware Implementation of the LESS Digital Signature Scheme
    Beckwith, Luke
    Wallace, Robert
    Mohajerani, Kamyar
    Gaj, Kris
    POST-QUANTUM CRYPTOGRAPHY, PQCRYPTO 2023, 2023, 14154 : 57 - 90
  • [36] Deep-Learning Inferencing with High-Performance Hardware Accelerators
    Kljucaric, Luke
    George, Alan D.
    2019 IEEE HIGH PERFORMANCE EXTREME COMPUTING CONFERENCE (HPEC), 2019,
  • [37] HARDWARE SOFTWARE ORGANIZATION OF A HIGH-PERFORMANCE ATM HOST INTERFACE
    TRAW, CBS
    SMITH, JM
    IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 1993, 11 (02) : 240 - 253
  • [38] HARDWARE ACCELERATORS FOR INFORMATION PROCESSING IN HIGH-PERFORMANCE COMPUTING SYSTEMS
    Sklyarov, Valery
    Skliarova, Iouliia
    Utepbergenov, Irbulat
    Akhmediyarova, Ainur
    INTERNATIONAL JOURNAL OF INNOVATIVE COMPUTING INFORMATION AND CONTROL, 2019, 15 (01): : 321 - 335
  • [39] A NEW HARDWARE ARCHITECTURE FOR HIGH-PERFORMANCE PARALLEL TURBO DECODER
    Elukuru, Sujatha
    Chennapalli, Subhas
    Nanjappa, Giriprasad Mahendra
    IIUM ENGINEERING JOURNAL, 2022, 23 (02): : 125 - 137
  • [40] High-Performance Hardware Implementation of MPCitH and Picnic3
    Liu G.
    Jia K.
    Wei P.
    Ju L.
    IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024, 2024 (02): : 190 - 214
12345