A soft lithographic approach to fabricate InAs nanowire field-effect transistors

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作者
Sang Hwa Lee
Sung-Ho Shin
Morten Madsen
Kuniharu Takei
Junghyo Nah
Min Hyung Lee
机构
[1] Kyung Hee University,Department of Applied Chemistry
[2] Chungnam National University,Department of Electrical Engineering
[3] Mads Clausen Institute University of Southern Denmark,SDU NanoSYD
[4] Alsion 2,Department of Physics and Electronics
[5] Osaka Prefecture University,undefined
[6] Sakai,undefined
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The epitaxial layer transfer process was previously introduced to integrate high-quality and ultrathin III-V compound semiconductor layers on any substrate. However, this technique has limitation for fabrication of sub-micron nanoribbons due to the diffraction limit of photolithography. In order to overcome this limitation and scale down its width to sub-50 nm, we need either a costly short wavelength lithography system or a non-optical patterning method. In this work, high-quality III-V compound semiconductor nanowires were fabricated and integrated onto a Si/SiO2 substrate by a soft-lithography top-down approach and an epitaxial layer transfer process, using MBE-grown ultrathin InAs as a source wafer. The width of the InAs nanowires was controlled using solvent-assisted nanoscale embossing (SANE), descumming, and etching processes. By optimizing these processes, NWs with a width less than 50 nm were readily obtained. The InAs NWFETs prepared by our method demonstrate peak electron mobility of ~1600 cm2/Vs, indicating negligible material degradation during the SANE process.
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