An ASIC design for LHAASO

被引:0
|
作者
XiongBo Yan
Zheng Wang
JinFan Chang
Wei Wei
WeiGuo Lu
机构
[1] Chinese Academy of Sciences,State Key Laboratory of Particle Detection and Electronics, Institute of High Energy Physics
[2] Graduate University of Chinese Academy of Sciences,undefined
关键词
LHAASO; analog ASIC; PMT readout; large dynamic range; low noise; good linearity;
D O I
暂无
中图分类号
学科分类号
摘要
The ASIC is widely used in the field of high energy physics. Astroparticle experiments benefit from high integration, small size and low power consumption. In this paper an analog chip named ARCHGARD (Analog Readout Chip for High energy Gamma Ray Detector) for high energy physics experiment is introduced. ARCHGARD is a readout chip, in chartered 0.35 μm SiGe technology, for photomultipliers (PMT) array readout. The chip is designed for the Large High Altitude Air Shower Observatory (LHAASO) project. The ASIC integrates 16 independent and auto-triggered channels with variable gain and variable shaping time. It provides analog output for charge measurement, which is performed from 1 up to 3000 photo-electrons (p.e.). The integral nonlinearity of the whole input range is less than 1% and the equivalent input noise is less than 1/10 p.e. Each channel has a trigger output for time measurement.
引用
收藏
相关论文
共 50 条
  • [41] Considerations on Teaching Digital ASIC Design
    Puhm, Andreas
    Roessler, Peter
    2014 IEEE/ASME 10TH INTERNATIONAL CONFERENCE ON MECHATRONIC AND EMBEDDED SYSTEMS AND APPLICATIONS (MESA 2014), 2014,
  • [42] Design-for-test methodologies and tools for ASIC design
    Strickland, Terry
    Electronic Products (Garden City, New York), 1995, 38 (01):
  • [43] An interface ASIC design using FPGA
    Luo, JJ
    Deng, XC
    1996 2ND INTERNATIONAL CONFERENCE ON ASIC, PROCEEDINGS, 1996, : 224 - 227
  • [44] ASIC DESIGN - PITFALLS AND PRACTICES.
    Laird, Bob
    1600, (19):
  • [45] Design of a modular and mixed neuromimetic ASIC
    Tomas, J.
    Bomat, Y.
    Saighi, S.
    Levi, T.
    Renaud, S.
    2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2006, : 946 - 949
  • [46] Buffer Design and Assignment for Structured ASIC
    Hsu, Po-Yang
    Liu, Yi-Y
    JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, 2014, 30 (01) : 107 - 124
  • [47] ASIC Design of M13
    葛宁
    High Technology Letters, 1996, (02) : 21 - 24
  • [48] VIDEL - AN INDEPENDENT APPROACH TO ASIC DESIGN
    DYER, S
    ELECTRONIC ENGINEERING, 1988, 60 (740): : 33 - &
  • [49] EXPERT SYSTEM POLISHES ASIC DESIGN
    ROSENBLATT, A
    ELECTRONIC PRODUCTS MAGAZINE, 1987, 30 (05): : 16 - 16
  • [50] ASIC Design-Wettwerb 2009
    不详
    ELEKTROTECHNIK UND INFORMATIONSTECHNIK, 2009, 126 (05): : A33 - A33