Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

被引:0
|
作者
Khandoker Asif Faruque
Baishakhi Rani Biswas
A. B. M. Harun-ur Rashid
机构
[1] Bangladesh University of Engineering and Technology,
关键词
Memristor; Transmission gate; Nonvolatile; High speed; Low power;
D O I
暂无
中图分类号
学科分类号
摘要
In this paper, a memristor–transistor hybrid architecture-based nonvolatile memory array design approach has been proposed. Here, a single memory cell consists of a memristor and one transmission gate, whereas a conventional SRAM cell consists of six transistors. This proposed design has the advantage of being nonvolatile, having high switching speed and low power requirement. The proposed cell shows better performance in comparison with other published memristor–transistor hybrid memory cell.
引用
收藏
页码:3585 / 3597
页数:12
相关论文
共 50 条
  • [21] Low Power Memristor-Based Shift Register Design
    Sasi, Abubakr
    Ahmadi, Majid
    Ahmadi, Arash
    [J]. 2020 27TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2020,
  • [22] High-Speed Decoder Design using Memristor-Based Nano-Crossbar Architecture
    Kule, Malay
    Dutta, Avik
    Rahaman, Hafizur
    Bhattacharya, Bhargab B.
    [J]. 2016 SIXTH INTERNATIONAL SYMPOSIUM ON EMBEDDED COMPUTING AND SYSTEM DESIGN (ISED 2016), 2016, : 77 - 81
  • [23] An MTJ-Based Nonvolatile Associative Memory Architecture With Intelligent Power-Saving Scheme for High-Speed Low-Power Recognition Application
    Ma, Yitao
    Shibata, Tadashi
    Endoh, Tetsuo
    [J]. 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 1248 - 1251
  • [24] High-speed and low-power ECL circuits design based on BiCMOS technology
    Wisetphanichkij, S
    Dejhan, K
    Cheevasuvit, F
    Soonyeekan, C
    [J]. APCCAS '98 - IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: MICROELECTRONICS AND INTEGRATING SYSTEMS, 1998, : 41 - 44
  • [25] High-speed and Low-power FRAM with a Bitline-Segmental Array
    Jia, Ze
    Liu, Jizhi
    Tao, Zihao
    Liu, Zhiwei
    Liu, Haiyang
    Liou, Juin J.
    Yang, Wei
    Zhao, Junfeng
    [J]. 2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2014,
  • [26] Memristor–CMOS hybrid ultra-low-power high-speed multivibrators
    Abhay S. Vidhyadharan
    Sanjay Vidhyadharan
    [J]. Analog Integrated Circuits and Signal Processing, 2022, 110 : 47 - 53
  • [27] High-speed and low-power design techniques for TCAM macros
    Wang, Chao-Ching
    Wang, Jinn-Shyan
    Yeh, Chingwei
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (02) : 530 - 540
  • [28] High-speed and low-power design of parallel turbo decoder
    He, ZY
    Roy, S
    Fortier, P
    [J]. 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 6018 - 6021
  • [29] Design of an Improved Low-Power and High-Speed Booth Multiplier
    Rafiq, Ahsan
    Chaudhry, Shabbir Majeed
    [J]. CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2021, 40 (11) : 5500 - 5532
  • [30] ASIC Design of High-Speed Low-Power HDLC Controller
    陈禾
    韩月秋
    [J]. Journal of Beijing Institute of Technology, 2003, (S1) : 66 - 69