Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design

被引：0
|
作者：
Khandoker Asif Faruque
Baishakhi Rani Biswas
A. B. M. Harun-ur Rashid
机构：
[1] Bangladesh University of Engineering and Technology,
来源：
Circuits, Systems, and Signal Processing | 2017年 / 36卷
关键词：
Memristor; Transmission gate; Nonvolatile; High speed; Low power;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
In this paper, a memristor–transistor hybrid architecture-based nonvolatile memory array design approach has been proposed. Here, a single memory cell consists of a memristor and one transmission gate, whereas a conventional SRAM cell consists of six transistors. This proposed design has the advantage of being nonvolatile, having high switching speed and low power requirement. The proposed cell shows better performance in comparison with other published memristor–transistor hybrid memory cell.
引用
收藏
页码：3585 / 3597
页数：12
相关论文
共 50 条
  • [31] ASIC Design of High-Speed Low-Power HDLC Controller
    陈禾
    韩月秋
    [J]. Journal of Beijing Institute of Technology(English Edition), 2003, (English Edition) : 66 - 69
  • [32] HIGH-SPEED LOW-POWER GAAS CROSSPOINT SWITCH DESIGN
    BAGHERI, M
    [J]. ELECTRONICS LETTERS, 1990, 26 (15) : 1142 - 1144
  • [33] High-speed and low-power UWB radio system design
    Namgoong, Won
    [J]. CONFERENCE RECORD OF THE FORTY-FIRST ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1-5, 2007, : 1320 - 1323
  • [34] Design of an Improved Low-Power and High-Speed Booth Multiplier
    Ahsan Rafiq
    Shabbir Majeed Chaudhry
    [J]. Circuits, Systems, and Signal Processing, 2021, 40 : 5500 - 5532
  • [35] Design of low-power high-speed bipolar frequency dividers
    Alioto, M
    Di Cataldo, G
    Palumbo, G
    [J]. ELECTRONICS LETTERS, 2002, 38 (04) : 158 - 160
  • [36] Impact of strain on the design of low-power high-speed circuits
    Ramakrishnan, H.
    Maharatna, K.
    Chattopadhyay, S.
    Yakovlev, A.
    [J]. 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, 2007, : 1153 - +
  • [37] Design criterion for high-speed low-power SC circuits
    Amoroso, F. A.
    Pugliese, A.
    Cappuccino, G.
    [J]. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2011, 39 (10) : 1067 - 1078
  • [38] Design of A High-Speed Low-Power Multiport Register File
    Li, Shenglong
    Li, Zhaolin
    Wang, Fang
    [J]. 2009 ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIMEASIA 2009), 2009, : 408 - +
  • [39] Design of High-Speed and Low-Power Comparator in Flash ADC
    Zhang, Shaozhen
    Li, Zheying
    Ling, Bo
    [J]. 2012 INTERNATIONAL WORKSHOP ON INFORMATION AND ELECTRONICS ENGINEERING, 2012, 29 : 687 - 692
  • [40] Analysis and design of high-speed and low-power CMOS PLAs
    Wang, JS
    Chang, CR
    Yeh, CW
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (08) : 1250 - 1262
12345