Modified super pass gate for multiple-valued logic circuits

被引：0

作者：

Kelly, PM ^{[1
]}

McGinnity, TM ^{[1
]}

Maguire, LP ^{[1
]}

机构：

[1] Univ Ulster, Magee Coll, Fac Engn, Intelligent Syst Engn Lab, Coleraine BT48 7JL, Londonderry, North Ireland

来源：

ELECTRONICS LETTERS | 2000年 / 36卷 / 22期

关键词：

D O I：

10.1049/el:20001288

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A model of a super pass gate (SPG) is adapted to allow multiple-valued logic circuit connections and designs that are normally prohibited by the formal synthesis and minimisation technique for the: device. The modification of the SPG allows more efficient circuit minimisation to be achieved for functions that do not readily reduce under the formal synthesis technique.

引用

页码：1834 / 1836

页数：3

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