Multiple-valued logic circuits using resonant tunneling diodes

被引:0
|
作者
Mazumder, P
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:123 / 126
页数:4
相关论文
共 50 条
  • [1] A novel multiple-valued logic gate using resonant tunneling devices
    Waho, T
    Chen, KJ
    Yamamoto, M
    [J]. IEEE ELECTRON DEVICE LETTERS, 1996, 17 (05) : 223 - 225
  • [2] QUANTUM FUNCTIONAL DEVICES - RESONANT-TUNNELING TRANSISTORS, CIRCUITS WITH REDUCED COMPLEXITY, AND MULTIPLE-VALUED LOGIC
    CAPASSO, F
    SEN, S
    BELTRAM, F
    LUNARDI, LM
    VENGURLEKAR, AS
    SMITH, PR
    SHAH, NJ
    MALIK, RJ
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (10) : 2065 - 2082
  • [3] MULTIPLE-VALUED LOGIC APPLICATION OF A TRIPLE WELL RESONANT TUNNELING DIODE
    KUSANO, C
    TANOUE, T
    MIZUTA, H
    TAKAHASHI, S
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (12) : 2453 - 2453
  • [4] Mask-programmable multiple-valued logic gate using resonant tunnelling diodes
    Chan, HLE
    Bhattacharya, M
    Mazumder, P
    [J]. IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 1996, 143 (05): : 289 - 294
  • [5] A novel functional logic circuit using resonant-tunneling devices for multiple-valued logic applications
    Waho, T
    Chen, KJ
    Yamamoto, M
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 1997, 36 (3B): : 1818 - 1821
  • [6] Multiple-Valued Reversible Logic Circuits
    De Vos, Alexis
    Van Rentergem, Yvan
    [J]. JOURNAL OF MULTIPLE-VALUED LOGIC AND SOFT COMPUTING, 2009, 15 (5-6) : 489 - 505
  • [7] Flash analog-to-digital converter using resonant-tunneling multiple-valued circuits
    Waho, T
    Hattori, K
    Takamatsu, Y
    [J]. 31ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS, 2001, : 94 - 99
  • [8] A TRIPLE-WELL RESONANT-TUNNELING DIODE FOR MULTIPLE-VALUED LOGIC APPLICATION
    TANOUE, T
    MIZUTA, H
    TAKAHASHI, S
    [J]. IEEE ELECTRON DEVICE LETTERS, 1988, 9 (08) : 365 - 367
  • [9] MULTIPLE-VALUED PROGRAMMABLE LOGIC ARRAY BASED ON A RESONANT-TUNNELING DIODE MODEL
    HANYU, T
    YABE, Y
    KAMEYAMA, M
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 1993, E76C (07) : 1126 - 1132
  • [10] Test generation for multiple faults in multiple-valued logic circuits
    Pan, ZL
    [J]. ICEMI'2003: PROCEEDINGS OF THE SIXTH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOLS 1-3, 2003, : 618 - 621