共 50 条
- [32] Interoperability of Verilog/VHDL procedural language interfaces to build a mixed language GUI DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, : 788 - 789
- [36] Intellectual Property Protection (IPP) using Obfuscation in C, VHDL, and Verilog Coding INDEPENDENT COMPONENT ANALYSES, WAVELETS, NEURAL NETWORKS, BIOSYSTEMS, AND NANOENGINEERING IX, 2011, 8058
- [37] A formal semantics for Verilog-VHDL simulation interoperability by abstract state machine DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION 1999, PROCEEDINGS, 1999, : 353 - 357
- [38] HOW CLOSE IS A STANDARD ANALOG EXTENSION TO VERILOG HDL COMPUTER DESIGN, 1994, 33 (09): : A10 - A10
- [40] ANALOG-VHDL - AS AN APPLICATION, A REAL EXAMPLE COMPUTER HARDWARE DESCRIPTION LANGUAGES AND THEIR APPLICATIONS, 1993, 32 : 587 - 604