A domain specific reconfigurable Viterbi fabric for system-on-chip applications

被引：0
|
作者：
Zhan, Cheng [1 ]
Arslan, Tughrul [1 ]
Khawam, Sami [1 ]
Lindsay, Iain [1 ]
机构：
[1] Univ Edinburgh, Sch Electron & Engn, Edinburgh EH9 3JL, Midlothian, Scotland
来源：
ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2005年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A novel embedded dynamically reconfigurable fabric for implementing the Viterbi algorithm in a System-on-Chip device is presented in this paper. The proposed reconfigurable fabric can support Viterbi implementations for different standards, such as GSM, IS-95, CDMA and Wireless LAN. Our results illustrate that the proposed architecture has superior power consumption and throughput characteristics and it is demonstrated a 80% reduction in power consumption over generic field programmable gate array (FPGA) and 40 times improvement in throughput over digital signal processor (DSP), respectively. Thus, the reconfigurable system-on-chip platform based on this kind of domain specific reconfigurable fabrics is an efficient solution for the high-performance portable communication systems.
引用
收藏
页码：916 / 919
页数：4
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