A SPICE COMPATIBLE MODEL OF ON-WAFER COUPLED INTERCONNECTS FOR CMOS RFICS

被引:9
|
作者
Shi, X. [1 ]
Yeo, K. S. [1 ]
Lim, W. M. [1 ]
Do, M. A. [1 ]
Boon, C. C. [1 ]
机构
[1] Nanyang Technol Univ, Sch EEE, Singapore 639798, Singapore
关键词
CHIP INTERCONNECTS; SILICON SUBSTRATE; LINES;
D O I
10.2528/PIER10010608
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper investigates the properties of the on-wafer coupled interconnects built in a 0.18 mu m CMOS technology for RF applications. A SPICE compatible equivalent circuit model is developed. The proposed model is an extension of a 2-Pi equivalent circuit model for single-line interconnects by adding two coupling components. The model parameters are extracted from four-port S-parameter simulation results through a calibrated electromagnetic (EM) simulator, i.e. HFSS. The accuracy of the model is validated from 500 MHz to 20 GHz.
引用
收藏
页码:287 / 299
页数:13
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