共 50 条
- [28] P-channel vertical double-gate MOSFET fabricated by utilizing ion-bombardment-retarded etching processs JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2004, 43 (4B): : 2156 - 2159
- [29] Drain induced barrier lowering: A short channel effect in a double-gate SOI MOSFET PHYSICS OF SEMICONDUCTOR DEVICES, VOLS 1 AND 2, 1998, 3316 : 1034 - 1038