Design of a Radiation Hardened Power-ON-Reset

被引：6

作者：

Lopez-Morillo, E. ^{[1
]}

Palomo, F. R. ^{[1
]}

Marquez, F. ^{[1
]}

Munoz, F. ^{[1
]}

机构：

[1] Univ Seville, Sch Engn, Dept Elect Engn, Seville 41092, Spain

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2018年 / 65卷 / 08期

关键词：

Conseil Europeen pour la Recherche Nucleaire (CERN); Large Hadron Collider (LHC); power-ON-reset (POR); radiation hardening by design; RD53; single-event effects (SEEs); total ionizing dose (TID); CMOS TECHNOLOGIES; CIRCUITS;

D O I：

10.1109/TNS.2018.2840326

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, the design of a power-ON-reset intellectual property (IP) block for the RD53 collaboration, a radiation hardening by design circuit to withstand the High-Luminosity Large Hadron Collider tracker radiation environment, is presented. In this environment, the performance of the IP block under radiation must be ensured for a total ionizing dose up to 500 Mrad and possible ions interaction for a linear energy transfer of 15 MeV/cm(2)/mg. To verify the radiation hardness of the presented circuit, an automatic single-event effect sensitivity tool (Analog Fault Tolerant University of Seville Hardware Debugging System) has been used to perform a complete analysis over it, and also several experiments have been performed to test the designed blocks and obtain the final IP qualification.

引用

页码：1943 / 1950

页数：8

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