An ECG measurement IC using driven-right-leg circuit

In this paper, an electrocardiographic (ECG) signal processing IC, which will be used for portable biomedical application, was designed using continuous-time technique. The circuit consists of an instrumentation amplifier (INA) with driven-right-leg circuit (DRL), a 5(th) order G(m)-C low pass filter (G(m)-C LPF) operating in sub-threshold mode, and amplifiers. DRL circuit is used to detect small amplitude signal in the presence of large common-mode voltage from the human body. The CMRR of the INA is 78 dB and the G(m)-C LPF has a cutoff frequency of 18 Hz. As a result of using the DRL, a small signal can be detected in the presence of large common-mode differential. The circuit consumes 1.23 mW when operating from with a supply voltage of +/- 1.5-V and occupies a core area of 0.94 mm(2). The circuit was designed in a 0.35 mu m CMOS process and simulation results have successfully demonstrated the functionalitics.