共 50 条
- [41] A low jitter delay-locked loop with a realignment duty cycle corrector IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2005, : 75 - 76
- [42] A harmonic quadrature LO generator using a 90′ delay-locked loop ESSCIRC 2004: PROCEEDINGS OF THE 30TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2004, : 127 - 130
- [44] Reliability Analysis of a Delay-Locked Loop Under HCI and BTI Degradation 2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2019,
- [45] Fast-Tracking Delay-Locked Loop for UWB Communication Systems 2013 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS (ICM), 2013,
- [46] Design techniques of delay-locked loop for jitter minimization in DRAM applications IEICE TRANSACTIONS ON ELECTRONICS, 2005, E88C (04): : 753 - 759
- [47] A 0.15 to 2.2 GHz All-Digital Delay-Locked Loop 2017 IEEE 15TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2017, : 261 - 264
- [48] Comparative Analysis of Delay-Locked Loop Signal Tracking for UWB Systems 2017 4TH INTERNATIONAL CONFERENCE ON CONTROL, DECISION AND INFORMATION TECHNOLOGIES (CODIT), 2017, : 144 - 148
- [50] A modified non-coherent delay-locked loop for CDMA systems VTC2004-SPRING: 2004 IEEE 59TH VEHICULAR TECHNOLOGY CONFERENCE, VOLS 1-5, PROCEEDINGS, 2004, : 1124 - 1128