共 50 条
- [2] PARAMETERIZABLE VLSI ARCHITECTURES FOR THE FULL-SEARCH BLOCK-MATCHING ALGORITHM [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1989, 36 (10): : 1309 - 1316
- [3] Cost Effective VLSI Architectures for Full-Search Block-Matching Motion Estimation Algorithm [J]. Journal of VLSI signal processing systems for signal, image and video technology, 1997, 17 : 225 - 240
- [4] Cost effective VLSI architecture for full-search block-matching motion estimation algorithm [J]. J VLSI Signal Process, 2-3 (225-240):
- [5] A performance-driven configurable motion estimator for full-search block-matching algorithm [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 233 - 236
- [6] Cost effective VLSI architectures for full-search block-matching motion estimation algorithm [J]. JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1997, 17 (2-3): : 225 - 240
- [7] Fast full-search block matching algorithm motion estimation alternatives in FPGA [J]. 2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, 2006, : 671 - 674
- [9] BLOCK-MATCHING TRANSLATION AND ZOOM MOTION-COMPENSATED PREDICTION [J]. ICME: 2009 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, VOLS 1-3, 2009, : 33 - +
- [10] A new architecture for computationally adaptive full-search block-matching motion estimation [J]. ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4: IMAGE AND VIDEO PROCESSING, MULTIMEDIA, AND COMMUNICATIONS, 1999, : 219 - 222