Random Threshold Voltage Variability Induced by Gate-Edge Fluctuations in Nanoscale Metal-Oxide-Semiconductor Field-Effect Transistors

被引:31
|
作者
Putra, Arifin Tamsir [1 ]
Nishida, Akio [2 ]
Kamohara, Shiro [2 ]
Hiramoto, Toshiro [1 ,2 ]
机构
[1] Univ Tokyo, Inst Ind Sci, Meguro Ku, Tokyo 1538505, Japan
[2] MIRAI Selete, Tsukuba, Ibaraki 3058569, Japan
关键词
LINE; ROUGHNESS;
D O I
10.1143/APEX.2.024501
中图分类号
O59 [应用物理学];
学科分类号
摘要
A very rapid method of estimating the effect of gate-edge fluctuation on threshold voltage (V-th) variability in metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. An empirical model is developed, in which correlation width (W-c) from gate line-width roughness (LWR) is a key parameter of the model. The validity of the model is confirmed using the measured data and an autoregressive model. Wc is extracted from the gate line-edge shape depicted in a scanning electron microscope (SEM) image. This method is very useful for the intuitive understanding of the gate-edge fluctuation effect on V-th variability. (C) 2009 The Japan Society of Applied Physics
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页数:3
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