A 2.4-GHz RF Fractional-N Synthesizer With BW=0.25 fREF

被引：23

作者：

Kong, Long ^{[1
]}

Razavi, Behzad ^{[1
]}

机构：

[1] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2018年 / 53卷 / 06期

关键词：

Sigma Delta noise; finite impulse response (FIR) filter; fractional-N synthesizer; loop bandwidth (BW); phase-locked loop (PLL); SUBSAMPLING PLL; BANDWIDTH; CMOS; LOOP;

D O I：

10.1109/JSSC.2018.2796544

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A fractional-N synthesizer architecture incorporates a 35-tap finite impulse response filter that suppresses the Sigma Delta noise, but does not affect the loop bandwidth (BW). Employing a three-stage ring oscillator and operating with a 22.6-MHz reference frequency, the synthesizer achieves a BW of around 5.6 MHz with a power consumption of 10 mW. Realized in 45-nm digital CMOS technology, the synthesizer exhibits a phase noise of -121.4 dBc/Hz at 10-MHz offset and an integrated jitter of 1.5 ps(rms).

引用

页码：1707 / 1718

页数：12

共 50 条

[31] A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching
Liao, Dongyi
Dai, Fa Foster
Nauta, Bram
Klumperink, Eric A. M.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018, 53 (03) : 715 - 727
[32] 2.4-2.5 GHz Fractional-N Frequency Synthesizer with Integrated VCO in 0.18 um CMOS for RFID Systems
Akhmetov, Denis B.
Korotkov, Alexander S.
Rumyancev, Ivan A.
PROCEEDINGS OF THE 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND PHOTONICS (EEXPOLYTECH), 2018, : 64 - 68
[33] A ΔΣ fractional-N frequency synthesizer with multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications
Rogers, JWM
Cavin, M
Dai, F
Rahn, D
ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2003, : 651 - 654
[34] A 5GHz CMGS monolithic fractional-N firequency synthesizer
Shen, WL
Hu, KM
Yi, XF
Zhou, Y
Hong, Z
2005 6th International Conference on ASIC Proceedings, Books 1 and 2, 2005, : 624 - 627
[35] A 4GHz fractional-N synthesizer for IEEE 802.11a
Chien, HM
Lin, TH
Ibrahim, B
Zhang, LJ
Rofougaran, M
Rofougaran, A
Kaiser, WJ
2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2004, : 46 - 49
[36] A 2.4-GHz Extended-Range Type-I ΣΔ Fractional-N Synthesizer With 1.8-MHz Loop Bandwidth and-110-dBc/Hz Phase Noise
Shekhar, Sudip
Gangopadhyay, Daibashish
Woo, Eum-Chan
Allstot, David J.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2011, 58 (08) : 472 - 476
[37] A fractional-N frequency synthesizer with no fractional spurs
Zhang, Xiaopin
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2006, 53 (09) : 986 - 990
[38] A wideband 2.4-GHz delta-sigma fractional-N PLL with 1-MB/s in-loop modulation
Pamarti, S
Jansson, L
Galton, I
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) : 49 - 62
[39] A 250-μW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications
Hong, Seunghwan
Kim, Shinwoong
Choi, Seungnam
Cho, Hwasuk
Hong, Jaehyeong
Seo, Young-Hun
Kim, Byungsub
Park, Hong-June
Sim, Jae-Yoon
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2017, 64 (02) : 106 - 110
[40] A hybrid ΔΣ fractional-N frequency synthesizer
Riley, T
Kostamovaara, J
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2003, 50 (04): : 176 - 180

← 1 2 3 4 5 →