A 4GHz fractional-N synthesizer for IEEE 802.11a

被引：44
|
作者：
Chien, HM
Lin, TH
Ibrahim, B
Zhang, LJ
Rofougaran, M
Rofougaran, A
Kaiser, WJ
机构：
来源：
2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2004年
关键词：
fractional; synthesizer; MMD; 802.11a and charge pump;
D O I：
10.1109/VLSIC.2004.1346498
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Phase noise of the Fractional-N synthesizer depends critically on the linearity of its building blocks. In this research, new design methods are shown to directly improve its linearity. This includes a new re-timing scheme that effectively reduces phase noise for multi-modulus dividers. Further reductions in phase noise result from introduction of a high linearity CMOS charge pump. Measurement results verify the concept and demonstrate low phase noise performance at 4GHz.
引用
收藏
页码：46 / 49
页数：4
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