共 50 条
- [41] Constrained specification-based test stimulus generation for analog circuits using nonlinear performance prediction models FIRST IEEE INTERNATION WORKSHOP ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, PROCEEDINGS, 2002, : 25 - 29
- [43] Chaotic binary bat algorithm for analog test point selection Analog Integrated Circuits and Signal Processing, 2015, 84 : 201 - 214
- [45] Optimization of test signals for analog circuits TELSIKS 2003: 6TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS IN MODERN SATELLITE, CABLE AND BROADCASTING SERVICE, VOLS 1 AND 2, PROCEEDINGS OF PAPERS, 2003, : 133 - 136
- [46] Double-fault detection at one test point of analog circuits Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), 1999, 27 (01): : 10 - 13
- [48] Automatic selection of test frequencies for the diagnosis of soft faults in analog circuits IMTC 2002: PROCEEDINGS OF THE 19TH IEEE INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE, VOLS 1 & 2, 2002, : 1503 - 1508
- [49] Test points selection process and diagnosability analysis of analog integrated circuits INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1998, : 582 - 587
- [50] Automated Test Case Generation from Input Specification in Natural Language 2022 IEEE INTERNATIONAL SYMPOSIUM ON SOFTWARE RELIABILITY ENGINEERING WORKSHOPS (ISSREW 2022), 2022, : 258 - 261