Low temperature operation of graded-channel SOI nMOSFETs for analog applications

被引：1
|
作者：
Pavanello, MA
Der Agopian, PG
Martino, JA
Flandre, D
机构：
[1] Univ Sao Paulo, Lab Sistemas Integraveis, BR-05508900 Sao Paulo, Brazil
[2] State Univ Campinas, Ctr Semicond Components, Campinas, Brazil
[3] Univ Catholique Louvain, Microelect Lab, B-1348 Louvain, Belgium
来源：
JOURNAL DE PHYSIQUE IV | 2002年 / 12卷 / PR3期
关键词：
D O I：
10.1051/jp420020030
中图分类号：
O4 [物理学];
学科分类号：
0702 ;
摘要：
We present in this work is an analysis of die low temperature operation of Graded-Channel fully-depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications. This analysis is supported by a comparison between the results obtained by MEDICI numerical bidimensional simulations and measurements. The Graded-Channel transistor presents higher Early voltage and transconductance at 100 K if compared to the conventional fully-depleted SOI nMOSFET.
引用
收藏
页码：23 / 26
页数：4
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