StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality Stereo Estimation With Binary Neural Network

被引:26
|
作者
Chen, Gang [1 ]
Ling, Yehua [1 ]
He, Tao [2 ]
Meng, Haitao [2 ]
He, Shengyu [2 ]
Zhang, Yu [1 ]
Huang, Kai [1 ]
机构
[1] Sun Yat Sen Univ, Sch Data & Comp Sci, Guangzhou 510275, Peoples R China
[2] Northeastern Univ, Sch Comp Sci & Engn, Shenyang, Peoples R China
基金
中国国家自然科学基金;
关键词
Binary neural network; FPGA accelerator; high-quality stereo estimation; real-time; ACCURATE;
D O I
10.1109/TCAD.2020.3012864
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Stereo estimation is essential to many applications such as mobile autonomous robots, most of which ask for real-time response, high energy, and storage efficiency. Deep neural networks (DNNs) have shown to yield significant gains in improving accuracy. However, these DNN-based algorithms are challenging to be deployed on energy and resource-constrained devices due to the high computational complexities of DNNs. In this article, we present StereoEngine, a fully pipelined end-to-end stereo vision accelerator that computes accurate dense depth in a real-time and energy-efficient manner. An efficient stereo algorithm is developed and optimized for a high-quality hardware-friendly implementation, that leverages binary neural network (BNN) to learn discriminative binary descriptors to improve the disparity. The design of StereoEngine is a standalone DNN-based stereo vision system where all processing procedures are implemented on a hardware platform. The effectiveness of StereoEngine is evaluated by comprehensive experiments. Compared with software-based implementations on the high-end and embedded Nvidia GPUs, StereoEngine achieves up to 3x, 13x, and 50x speedups, as well as up to 211x, 58x, and 73x energy efficiency improvement, respectively. Furthermore, StereoEngine achieves leading accuracy when compared to state-of-the-art hardware implementations on the challenging KITTI dataset.
引用
收藏
页码:4179 / 4190
页数:12
相关论文
共 50 条
  • [11] FPGA-Based Real-Time Multichannel Neural Dataset Generation
    Schaffer, Laszlo
    Nagy, Zoltan
    Kincses, Zoltan
    Fiath, Richard
    2017 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), 2017,
  • [12] FPGA-based real-time epileptic seizure classification using Artificial Neural Network
    Saric, Rijad
    Jokic, Dejan
    Beganovic, Nejra
    Pokvic, Lejla Gurbeta
    Badnjevic, Almir
    BIOMEDICAL SIGNAL PROCESSING AND CONTROL, 2020, 62
  • [13] An FPGA-based binary neural network accelerator with enhanced hardware efficiency and data reuse
    Zhang, Dezheng
    Cen, Rui
    Pu, Han
    Wan, Rui
    Wang, Dong
    MICROELECTRONICS JOURNAL, 2025, 156
  • [14] A reconfigurable FPGA-based spiking neural network accelerator
    Yin, Mingqi
    Cui, Xiaole
    Wei, Feng
    Liu, Hanqing
    Jiang, Yuanyuan
    Cui, Xiaoxin
    MICROELECTRONICS JOURNAL, 2024, 152
  • [15] Real-Time High-Quality Stereo Matching System on a GPU
    Chang, Qiong
    Maruyama, Tsutomu
    2018 IEEE 29TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2018, : 17 - 24
  • [16] FPGA-Based Real-Time EMTP
    Chen, Yuan
    Dinavahi, Venkata
    IEEE TRANSACTIONS ON POWER DELIVERY, 2009, 24 (02) : 892 - 902
  • [17] FPGA-Based Feature Extraction and Tracking Accelerator for Real-Time Visual SLAM
    Zhang, Jie
    Xiong, Shuai
    Liu, Cheng
    Geng, Yongchao
    Xiong, Wei
    Cheng, Song
    Hu, Fang
    SENSORS, 2023, 23 (19)
  • [18] An FPGA-Based High-Throughput Dataflow Accelerator for Lightweight Neural Network
    Zhao, Zhiyuan
    Li, Jixing
    Chen, Gang
    Jiang, Zhelong
    Qiao, Ruixiu
    Xu, Peng
    Chen, Yihao
    Lu, Huaxiang
    2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024, 2024,
  • [19] VHDL Generator for A High Performance Convolutional Neural Network FPGA-Based Accelerator
    Hamdan, Muhammad K.
    Rover, Diane T.
    2017 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2017,
  • [20] Real-Time Fixed-Point Hardware Accelerator of Convolutional Neural Network on FPGA Based
    Ozkilbac, Bahadir
    Ozbek, Ibrahim Yucel
    Karacali, Tevhit
    5TH INTERNATIONAL CONFERENCE ON COMPUTING AND INFORMATICS (ICCI 2022), 2022, : 1 - 5