A PVT-Tolerant Relaxation Oscillator in 65nm CMOS

被引：0

作者：

Cimbili, B. ^{[1
]}

Wang, D. ^{[1
]}

Zhang, R. C. ^{[1
]}

Tan, X. L. ^{[2
]}

Chan, P. K. ^{[1
]}

机构：

[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore

[2] MediaTek, Singapore, Singapore

来源：

PROCEEDINGS OF THE 2016 IEEE REGION 10 CONFERENCE (TENCON) | 2016年

关键词：

PET insensitive circuit; relaxation oscillator; temperature compensation; current reference; voltage reference; TEMPERATURE;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A fully-integrated CMOS relaxation oscillator (ROSC) using a process-voltage-temperature (PVT) insensitive current reference generator is presented. The oscillator is designed to generate a clock frequency of 64.4kHz in 65-nm CMOS technology for switched-capacitor circuit applications. The Monte-Carlo simulation results have shown that the ROSC is able to achieve 3.66% in the process sensitivity (sigma/mu. The output frequency variation is 1.71% over the temperature range front -20 degrees C to 100 degrees C and 0.73% over the supply variation front 1.2V to 2V. The power consumption of ROSC is 4.32 mu W at 1.2V supply. It has displayed better figure-of merit (FOM) against PVT variations with respect to other reported prior-art works.

引用

页码：2315 / 2318

页数：4

共 50 条

[21] New Subthreshold Concepts in 65nm CMOS Technology
Moradi, Farshad
Wisland, Dag T.
Mahmoodi, Hamid
Peiravi, Ali
Aunet, Snorre
Cao, Tuan Vu
ISQED 2009: PROCEEDINGS 10TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, VOLS 1 AND 2, 2009, : 162 - +
[22] Optimization of TIA topologies in a 65nm CMOS process
Polster, Robert
Jimenez, Jose Luis Gonzalez
Cassan, Eric
Vincent, Pierre
2014 IEEE OPTICAL INTERCONNECTS CONFERENCE, 2014, : 117 - 118
[23] Self-Cascode Active Inductor in 65nm Bulk CMOS For Low Power RF Oscillator
Meharde, Priya
Niranjan, Vandana
Kumar, Ashwni
2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, COMPUTING AND COMMUNICATION TECHNOLOGIES (CONECCT), 2015,
[24] 0.4V Low-Power 60-GHz Oscillator in 65nm CMOS
Pepe, Domenico
Zito, Domenico
2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2012, : 789 - 792
[25] A Low-Phase-Noise Wide-Tuning-Range Quadrature Oscillator in 65nm CMOS
Li, Guansheng
Afshari, Ehsan
2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
[26] Low-Power and High-Frequency Ring Oscillator Design in 65nm CMOS Technology
Yen, Chi-Hsien
Nasrollahpour, Mehdi
Hamedi-hagh, Sotoudeh
2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2017, : 533 - 536
[27] A 194 GHz Fundamental Frequency Oscillator with 1.85 mW Differential Output Power in 65nm CMOS
Thanh Dat Nguyen
Hong, Jong-Phil
2017 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS), 2017, : 1715 - 1717
[28] Fault-tolerant delay cell for ring oscillator application in 65 nm CMOS technology
Salem, Sanaz
Zandevakili, Hamed
Mahani, Ali
Saneei, Mohsen
IET CIRCUITS DEVICES & SYSTEMS, 2018, 12 (03) : 233 - 241
[29] Radiation Tolerant SRAM Cell Design in 65nm Technology
JianAn Wang
Xue Wu
Haonan Tian
Lixiang Li
Shuting Shi
Li Chen
Journal of Electronic Testing, 2021, 37 : 255 - 262
[30] A PVT-Tolerant MDLL Using a Frequency Calibrator and a Voltage Monitor
Chiu, Yu-Kai
Liu, Shen-Iuan
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 27 (11) : 2698 - 2702

← 1 2 3 4 5 →