A design of general multiplier in GF(28) and FPGA implementation

被引:1
|
作者
Yang, Xiaohui [1 ]
Dai, Zibin [1 ]
Yu, Xuerong [1 ]
Su, Jinhai [1 ]
机构
[1] PLA Informat Engn Univ, Inst Elect Technol, Zhengzhou 450004, Peoples R China
关键词
finite field; GF (2(8)) multiplication; FPGA;
D O I
10.1109/SPCA.2006.297444
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In the paper, we have introduced the theory of Generalized Multiplier in GF (2(8)). The design can be used in GF (2(8)) for arbitrary modulo polynomial. Based on the theory, we have implemented the circuit based on our design schemes, and take example in the various cipher algorithms application. Finally, we give the implementation result based on the FPGA of the family of Stratix II of Altera corporation.
引用
收藏
页码:503 / +
页数:2
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