共 50 条
- [21] Reconfigurable Network-on-Chip Design for Heterogeneous Multi-core System Architecture [J]. 2014 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS), 2014, : 523 - 526
- [22] Latency Analysis of Network-On-Chip based Many-Core Processors [J]. 2014 22ND EUROMICRO INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING (PDP 2014), 2014, : 432 - 439
- [27] Rapid Topology Generation and Core Mapping of Optical Network-on-Chip for Heterogeneous Computing Platform [J]. IEEE ACCESS, 2021, 9 : 110359 - 110370
- [28] Simulation Environment for Design and Verification of Network-on-Chip and Multi-core Systems [J]. 2009 IEEE INTERNATIONAL SYMPOSIUM ON MODELING, ANALYSIS & SIMULATION OF COMPUTER AND TELECOMMUNICATION SYSTEMS (MASCOTS), 2009, : 403 - 411
- [29] Mesh-tree architecture for network-on-chip design [J]. Second International Conference on Innovative Computing, Information and Control, ICICIC 2007, 2007,
- [30] Design of Mesh & Torus Topologies for Network-on-Chip Application [J]. INTERNATIONAL JOURNAL OF COMPUTER SCIENCE AND NETWORK SECURITY, 2014, 14 (07): : 111 - 115