Preemptive Test Scheduling for Network-on-Chip Using Particle Swarm Optimization

被引：0

作者：

Manna, Kanchan ^{[1
]}

Singh, Shailesh ^{[2
]}

Chattopadhyay, Santanu ^{[2
]}

Sengupta, Indranil ^{[3
]}

机构：

[1] Indian Inst Technol, Sch Informat Technol, Kharagpur 721302, W Bengal, India

[2] Indian Inst Technol, Dept Elect & Elect Comm Engn, Kharagpur 721302, W Bengal, India

[3] Indian Inst Technol, Dept Comp Sci, Kharagpur 721302, W Bengal, India

来源：

VLSI DESIGN AND TEST, VDAT 2013 | 2013年 / 382卷

关键词：

NoC testing; PSO; Non-preemptive testing and preemptive testing; POWER;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Network-on-Chip (NoC) has evolved as a promising technique for the present-day's communication in the VLSI design paradigm. It ensures reusability, parallelism and scalability. To reduce the testing cost of such a system, the existing communication structure ca be reused. In this paper, we have proposed a Particle Swarm Optimization (PSO) based mixed test scheduling approach to test the cores in the NoC environment. It incorporates both non-preemptive and preemptive tests. Experimental results for ITC'02 System-on-Chip (SoC) benchmarks show that the PSO based mixed test scheduling approach efficiently reduces the overall test application time compared to other existing works.

引用

页码：74 / 82

页数：9

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