Low Latency Multicasting Scheme for Bufferless Hybrid NoC-Bus 3D On-Chip Networks

被引:0
|
作者
Yao, Chaoyun [1 ]
Feng, Chaochao [1 ]
Zhang, Mingxuan [1 ]
Wei, Shaojun [2 ]
机构
[1] Natl Univ Def Technol, Sch Comp, Changsha, Hunan, Peoples R China
[2] Tsinghua Univ, Dept Elect Syst, Beijing 100084, Peoples R China
关键词
NoC-Bus; 3D; multicast;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we proposed a novel multicast routing algorithm for the 3D Bufferless Hybrid Interconnection Network to enhance the overall system performance. The proposed algorithm makes use of a single-hop and broadcast (bus-based) interlayer communication of the 3D NoC-Bus mesh architecture. Compared to the DRM_ noPR multicast routing algorithm, our simulations with six different synthetic workloads reveal that our architecture using the proposed multicast routing algorithm acquires high system performance.
引用
收藏
页码:36 / 47
页数:12
相关论文
共 45 条
  • [21] High-speed and Low-latency 3D Sensing with a Parallel-bus Pattern
    Miyashita, Leo
    Tabata, Satoshi
    Ishikawa, Masatoshi
    2022 INTERNATIONAL CONFERENCE ON 3D VISION, 3DV, 2022, : 291 - 300
  • [22] 3D Interdigital Au/MnO2/Au Stacked Hybrid Electrodes for On-Chip Microsupercapacitors
    Hu, Haibo
    Pei, Zhibin
    Fan, Hongjin
    Ye, Changhui
    SMALL, 2016, 12 (22) : 3059 - 3069
  • [23] Venus: A Low-Latency, Low-Loss 3-D Hybrid Network-on-Chip for Kilocore Systems
    Tan, Wei
    Gu, Huaxi
    Yang, Yintang
    Wang, Kun
    Wang, Xiaolu
    JOURNAL OF LIGHTWAVE TECHNOLOGY, 2017, 35 (24) : 5448 - 5455
  • [24] Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC)
    Akram Ben Ahmed
    Abderazek Ben Abdallah
    The Journal of Supercomputing, 2013, 66 : 1507 - 1532
  • [25] Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC)
    Ben Ahmed, Akram
    Ben Abdallah, Abderazek
    JOURNAL OF SUPERCOMPUTING, 2013, 66 (03): : 1507 - 1532
  • [26] On-chip 3D confocal optical study of an InGaN/GaN microrod LED in the low excitation regime
    Meier, Johanna
    Kahl, Julius
    Avramescu, Adrian
    Strassburg, Martin
    Bacher, Gerd
    JOURNAL OF APPLIED PHYSICS, 2021, 130 (02)
  • [27] A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip
    Coelho, Alexandre
    Charif, Amir
    Zergainoh, Nacer-Eddine
    Velazco, Raoul
    2018 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2018,
  • [28] The Roce-Bush Router: A Case for Routing-centric Dimensional Decomposition for Low-latency 3D NoC Routers
    Salas, Miguel
    Pasricha, Sudeep
    CODES+ISSS'12:PROCEEDINGS OF THE TENTH ACM INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE-CODESIGN AND SYSTEM SYNTHESIS, 2012, : 171 - 180
  • [29] A Hybrid Low-Latency D2D Resource Allocation Scheme Based on Cellular V2X Networks
    Abbasand, Fakhar
    Fan, Pingzhi
    2018 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS WORKSHOPS (ICC WORKSHOPS), 2018,
  • [30] On-chip size, low-noise fringe pattern projector offering highly accurate 3D measurement
    Hirose, Kazuyoshi
    Watanabe, Koyo
    Kamei, Hiroki
    Sugiyama, Takahiro
    Takiguchi, Yu
    Kurosaka, Yoshitaka
    OPTICS LETTERS, 2023, 48 (06) : 1387 - 1390