共 45 条
- [21] High-speed and Low-latency 3D Sensing with a Parallel-bus Pattern 2022 INTERNATIONAL CONFERENCE ON 3D VISION, 3DV, 2022, : 291 - 300
- [24] Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC) The Journal of Supercomputing, 2013, 66 : 1507 - 1532
- [25] Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC) JOURNAL OF SUPERCOMPUTING, 2013, 66 (03): : 1507 - 1532
- [27] A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip 2018 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI AND NANOTECHNOLOGY SYSTEMS (DFT), 2018,
- [28] The Roce-Bush Router: A Case for Routing-centric Dimensional Decomposition for Low-latency 3D NoC Routers CODES+ISSS'12:PROCEEDINGS OF THE TENTH ACM INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE-CODESIGN AND SYSTEM SYNTHESIS, 2012, : 171 - 180
- [29] A Hybrid Low-Latency D2D Resource Allocation Scheme Based on Cellular V2X Networks 2018 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS WORKSHOPS (ICC WORKSHOPS), 2018,