共 50 条
- [2] An efficient architecture for 1-D discrete biorthogonal wavelet transform [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 697 - 700
- [3] Memory-Efficient Architecture of 2-D Discrete Wavelet Transform [J]. Hsi-An Chiao Tung Ta Hsueh/Journal of Xi'an Jiaotong University, 2022, 56 (01): : 177 - 183
- [4] A novel efficient VLSI architecture of 2-D discrete wavelet transform [J]. 2008 FOURTH INTERNATIONAL CONFERENCE ON INTELLIGENT INFORMATION HIDING AND MULTIMEDIA SIGNAL PROCESSING, PROCEEDINGS, 2008, : 647 - 650
- [5] A scalable architecture for 2-D discrete wavelet transform [J]. VLSI SIGNAL PROCESSING, IX, 1996, : 369 - 377
- [6] A new architecture for the 2-D discrete wavelet transform [J]. 1997 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING, VOLS 1 AND 2: PACRIM 10 YEARS - 1987-1997, 1997, : 481 - 484
- [7] An Efficient Architecture for 2-D Lifting-based Discrete Wavelet Transform [J]. ICIEA: 2009 4TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, VOLS 1-6, 2009, : 3658 - 3661
- [8] An efficient line-based architecture for 2-D discrete wavelet transform [J]. 2005 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS: VOL 1: COMMUNICATION THEORY AND SYSTEMS, 2005, : 1322 - 1325
- [10] DESIGN AND IMPLEMENTATION OF GENERIC 2-D BIORTHOGONAL DISCRETE WAVELET TRANSFORM ON FPGA [J]. 2015 INTERNATIONAL CONFERENCE ON ENERGY SYSTEMS AND APPLICATIONS, 2015, : 622 - 627