A TSV Alignment Design for Multilayer 3D IC

被引：0

作者：

Zhao, Wei ^{[1
]}

Hou, Ligang ^{[1
]}

Peng, Xiaohong ^{[1
]}

Wang, Jinhui ^{[1
]}

Fu, Jingyan ^{[1
]}

Yang, Yang ^{[1
]}

机构：

[1] Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China

来源：

PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | 2015年

基金：

中国国家自然科学基金;

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Through-silicon via (TSV) achieves interconnects of multiple dies in a 3D IC. Previous researches show that irregular TSV placement may cause reliability issues in manufacturing. Therefore, this paper forwards a TSV alignment design in acquiring an overlap-free near-regular TSV placement. This design features a TSV alignment algorithm which aligns an irregular TSV placement into a near-regular one. Experiments are conducted on 2D-3D transformation of IBM benchmark circuits. Results show that this design successfully realizes a near-regular overlap-free TSV placement.

引用

页数：4

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