Evaluation for Anomalous Stress-Induced Leakage Current of Gate SiO2 Films Using Array Test Pattern

被引：6

作者：

Kumagai, Yuki ^{[1
]}

Teramoto, Akinobu ^{[2
]}

Inatsuka, Takuya ^{[1
]}

Kuroda, Rihito ^{[1
]}

Suwa, Tomoyuki ^{[2
]}

Sugawa, Shigetoshi ^{[1
]}

Ohmi, Tadahiro ^{[2
]}

机构：

[1] Tohoku Univ, Grad Sch Engn, Sendai, Miyagi 9808579, Japan

[2] Tohoku Univ, New Ind Creat Hatchery Ctr, Sendai, Miyagi 9808579, Japan

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2011年 / 58卷 / 10期

基金：

日本学术振兴会;

关键词：

Electrical stress; Flash memory; gate leakage current; low current detection; test pattern; tunnel oxide; SOFT BREAKDOWN; MODEL; GENERATION; OXIDES; IMPACT; NOISE; NM;

D O I：

10.1109/TED.2011.2161991

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Using the array test pattern, gate current through the tunnel oxide on the order of 10(-16) A can be measured for about 1 000 000 transistors within 4 min. Because this test pattern can be fabricated by simple processes and its peripheral circuits are simple structures, the tunnel dielectric formation method and condition can be changed drastically. It was found that anomalous stress-induced leakage current (SILC) appears or disappears by applying electrical stress, and it is annealed out during a relatively high temperature measurement at 60 degrees C. Random telegraph signal in SILC can be observed in some transistors. These are very similar phenomena observed in Flash memory cells. We consider that, using this test pattern for the development of tunnel oxide, we can clarify the origin of anomalous SILC and promote the downscaling of tunnel oxide thickness.

引用

页码：3307 / 3313

页数：7

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