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- [22] IEC ESD Co-Design Methodology for On-Chip Protection at High Voltage Fault Tolerant Transceivers 2023 45TH ANNUAL EOS/ESD SYMPOSIUM, EOS/ESD, 2023,
- [24] FinFET SCR: Design Challenges and Novel Fin SCR Approaches for On-Chip ESD Protection 2017 39TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2017,
- [25] Design and Optimization of SCR Devices for On-chip ESD Protection in Advanced SOI CMOS Technologies 2012 34TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2012,
- [27] A new design methodology using simulation for on-chip ESD protection designs for integrated circuits 1998 5TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY PROCEEDINGS, 1998, : 509 - 512
- [28] Design of a distributed amplifier with on-chip ESD protection circuit in 130 nm SOICMOS technology 2007 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS, 2007, : 111 - +